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19 articles tagged as instruction-set-architecture

The end

The end

Time to say goodbye from all of us at bit-tech.net

November 1, 2021 | 14:00

Inscryption Review

Inscryption Review

Welcome challenger. Why not sit down, and play a little game?

October 27, 2021 | 12:05

SilentiumPC Regnum RG6V TG Case Review

SilentiumPC Regnum RG6V TG Case Review

Budget in price, mainstream in aspiration.

October 21, 2021 | 09:43

Huawei confirms a RISC-V switch could follow US embargo

Huawei confirms a RISC-V switch could follow US embargo

Isn't actively working on it, though.

August 27, 2019 | 11:19

IBM's OpenPower Foundation opens Power ISA

IBM's OpenPower Foundation opens Power ISA

Joins the fray with RISC-V.

August 21, 2019 | 11:48

Alibaba unveils high-performance XT910 RISC-V chip

Alibaba unveils high-performance XT910 RISC-V chip

16C16T at 2.5GHz a major milestone.

July 26, 2019 | 09:39

RISC-V Foundation ratifies ISA specifications

RISC-V Foundation ratifies ISA specifications

Full steam ahead for commercialisation.

July 11, 2019 | 11:33

SiFive CEO predicts RISC-V smartphones, servers within five years

SiFive CEO predicts RISC-V smartphones, servers within five years

As few as two years for phones.

June 26, 2019 | 11:48

Researchers unveil 'unhackable' Morpheus processor

Researchers unveil 'unhackable' Morpheus processor

Sounds like a challenge.

May 3, 2019 | 11:11

Synaptics announces shift to RISC-V processors

Synaptics announces shift to RISC-V processors

Partners with SiFive.

April 12, 2019 | 11:10

Wave releases first MIPS Open bundle

Wave releases first MIPS Open bundle

Aims to give RISC-V a run for its money.

March 29, 2019 | 10:49

Linux Foundation launches FOSSi-focused CHIPS Alliance

Linux Foundation launches FOSSi-focused CHIPS Alliance

SiFive, WD, Esperanto, and Google as founders.

March 12, 2019 | 11:09

Nvidia, AdaCore partnership telegraphs RISC-V shift

Nvidia, AdaCore partnership telegraphs RISC-V shift

Not just for logic chips any more.

February 6, 2019 | 10:58

Wave Computing sets MIPS free

Wave Computing sets MIPS free

Takes aim at RISC-V.

December 18, 2018 | 10:28

SiFive's RISC-V cores launch in two SSD families

SiFive's RISC-V cores launch in two SSD families

Serious performance promised.

August 8, 2018 | 11:39

Arm targets RISC-V in aggressive marketing push

Arm targets RISC-V in aggressive marketing push

Tries to 'educate' SoC designers.

July 10, 2018 | 10:52

Intel Capital invests in RISC-V start-up SiFive

Intel Capital invests in RISC-V start-up SiFive

Concentrating on microcontroller promise.

May 9, 2018 | 10:47

SiFive announces funding, Western Digital partnership

SiFive announces funding, Western Digital partnership

Will assist with a billion RISC-V cores.

April 3, 2018 | 11:18

SiFive announces 64-bit 1.5GHz RISC-V HiFive Unleashed SBC

SiFive announces 64-bit 1.5GHz RISC-V HiFive Unleashed SBC

Price an issue, though.

February 5, 2018 | 10:30

Western Digital announces planned RISC-V data-processing products

Western Digital announces planned RISC-V data-processing products

A billion cores within two years.

November 30, 2017 | 10:46

Soft Machines unveils VISC virtual chip architecture

Soft Machines unveils VISC virtual chip architecture

Promises 2-4x boost in performance.

October 24, 2014 | 12:04

BSD coder finds AMD processor bug

BSD coder finds AMD processor bug

A coder on the DragonFly BSD project has tracked down a bug in AMD's instruction set architecture.

March 6, 2012 | 12:43

Project logs

modding content

Corsair

MSI MPG Velox 100R Chassis Review

October 14 2021 | 15:04

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